1. Field of the Invention
The present invention relates to the field of erasable programmable logic devices and more specifically to data flow in macrocells associated with an EPROM array.
2. Prior Art
The use of electrically programmable read-only-memories (EPROMs) is a well-known technology in the prior art. Recently, EPROM devices have been combined with programmable logic arrays (PLAs) and have provided a novel advancement in the area of erasable programmable logic devices (EPLD). One EPROM array architecture is disclosed in two U.S. Pat. Nos. 4,609,986 and 4,617,479 to Hartmann et al,. Such array architecture utilizes a plurality of EPROM cells which are arranged in a row and column matrix structure. Normally, outputs of the columns of an array are coupled as inputs to a macrocell architecture for further dynamic processing by circuits within the macrocell.
General use of macrocells in EPROM arrays is well-known in the prior art. In most instances, these macrocells are coupled to receive outputs from an "AND" array. The AND'ed outputs from the AND array are referred to as product terms and a number of these product terms are coupled as inputs to an OR gate to provide a sum of product term. The output of the OR gate is then coupled to an input/output (I/O) circuit which provides either a combinatorial logic or a sequential logic circuit. In most instances feedback lines from the I/O circuit are coupled back to the array. The use of such I/O configuration to provide combinatorial or sequential logic is well-known in the prior art.
As used in the prior art, each macrocell typically operates independently of other macrocells such that product terms of a given macrocell are provided to an I/O circuit of a given macrocell. For example, in a eight product term macrocell, if a given algorithm/logic requires less than eight terms, then the excess product term are unused and are wasted. If more than eight terms are required for a given logic function, then additional circuitry must be designed to couple a plurality of macrocells for this given function. Again for eight product term macrocells each additional macrocell will require the usage of product terms having a multiple of eight. That is, if ten product terms are required, then two macrocells are needed, resulting in six product terms of the second macrocell being unused.
It is appreciated that what is needed is an improved scheme in which product terms can be shared among macrocells and in which such sharing allows flexibility in the number of product terms shared.